Use Datasheets for Capacitor Models (Basic, yet useful SPICE model)

As frequency increases the characteristics of inductors and capacitors changes. At high frequencies capacitors may start to behave like an inductor and vice versa.

In this blogpost, we are going to create a SPICE model that model the frequency-dependent behavior of capacitors. The model is going to be based on impedance versus fruquency graph of the capacitors that are given in the datasheet of the capacitor.

What we are basically going to do is that we try to reproduce impedance versus frequency graph, which is given in the datasheet of the capacitor.

In the datasheet of an inductor or capacitor impedance vs. frequency graph looks something similar to do the following images shown below.

Figure.1

The one on the left shows an impedance vs. frequency graph of a capacitor and the one on the right shows an impedance vs. frequency graph of multiple inductors of different values. As expected capacitor’s impedance decreases as frequency increases, but at certain point the graph flips and starts to rise the other way around, that is the effect of parasitics in the capacitors. Very similar thing is also true for the inductors. Inductor’s impedance increases as frequency increases, but after certain point the rise in impedance is not sustained because of the parasitics in the inductor.

Series RLC circuits and real capacitors have very similar impedance vs. frequency graphs. Therefore, we are going to model capacitors as a series RLC circuit.

Modeling Capacitors

We are going to look at a specific capacitor, but the method we are going to use can be applied to any capacitor. The capacitor we are going to look at is GRM1552C1H121GA01 from murata. The capacitor is going to be modeled as a series RLC circuit. To model the capacitor you are going to need a frequency vs. impedance of the capacitor from the datasheet of the capacitor.  GRM1552C1H121GA01‘s frequency vs. impedance graph is shown in figure.1 below.

Figure.2 Impedance vs. Frequency graph of the capacitor.

As it’s shown in figure.2 the frequency of the “dip” in the graph is the resonance frequency, fr, of the capacitor. This is caused by the internal series parasitic inductance of the capacitor. The magnitude of the impedance at the resonance frequency is the series parasitic resistance, or ESR (equivalent series resistance denoted as Rp), of the capacitor.

ESR of the capacitor is obviously 200 mOhm. The series parasitic inducatance is calculated to be 375 pH. These calculations are clearly shown in figure.3.

Figure.3 Series RLC Equivalent of the Capacitor.

Let us now look at how well-matched the SPICE simulation and the provided data in the datasheet of the capacitor. We basically need to run AC simulation in SPICE and calculate the impedance of the RLC circuit that is simulated. LTspice is used. The simulation results are shown below in figure.4.

Figure.4 Simulation Results of the Series RLC Capacitor Model

As it’s seen in figure.4 simulation and the real data are pretty close to each other. Thus, to model the impedance of a real capacitor series RLC circuit is a pretty good choice.